Module/Course Title: Computer Architecture and Organization

Module course code

KOMS120203

Student Workload
119 hours

Credits

3 / 4.5 ETCS

Semester

2

Frequency

Even Semester

Duration

16

1

Type of course

Core Study Courses

Contact hours


42.50 hours of face-to-face (theoretical) class activity

Independent Study


48.50 hours of independent activity
45 hours of structured activities

Class Size

30

2

Prerequisites for participation (if applicable)

-

3

Learning Outcomes

  1. Students can demonstrate systematic thinking in selecting information technology architecture
  2. Students can analyze information technology infrastructure requirements
  3. Students can design information technology infrastructure solutions
  4. Students can explain the basic structure of computers
  5. Students can design simple machine instructions and programs
  6. Students can explain input or output organization
  7. Students can explain computer memory system
  8. Students can explain the instruction sets architecture

4

Subject aims/Content

At the first meeting, students will be given an explanation regarding the topics of computer architecture and organization in general. The topic of discussion then continued with the topic of computer structure and function. This topic includes discussion of the basic operational concepts of computers, ALUs, control units, and registers. Several weeks later the discussion continued with the topic of machine instructions and programs. This topic includes assembly programming, addressing modes, and other topics related to machine programming. Next, the discussion continued with the topic of input-output organization.

Study Material

Architecture and computer organization in general

Function and structure of computer architecture

Machine instructions and programs

 

Machine instructions and programs

 

Machine instructions and programs

 

Input Output Organization

 

Input Output Organization

 

Midterm Exam

Computer memory system

Computer memory system

Computer memory system

Computer memory system

Disk management policies

Instruction Sets Architecture

Instruction Sets Architecture

Final Term Exam

5

Teaching methods

Synchronous:

  • Live synchronous or virtual synchronous contains lectures and question and answer discussions.

 

Self-Paced Asynchronous:

  • Students learn through the given materials in e-learning.

6

Assesment Methods

  • Attendance;
  • Participation in class (live/virtual).

7

This module/course is used in the following study programme/s as well

Computer Science Study Programme

8

Responsibility for module/course

  • Ni Putu Novita Puspa Dewi, S.Kom., M.Cs.
  • NIDN : 199410032020122000

9

Other Information

  1. Stallings, William. 2013. "Computer Organization and Architecture: Designing for Perfomance 9th Edition". USA: Pearson Education Inc.
  2. Hamacher, Carl; Vranesic, Zvonko; Zaky, Safwat. 2002. "Computer Organization Fifth edition". McGrawHill.
  3. Gibson, Darril. 2013. "CompTIA A+ Training Kit Exam 220-801 & 220-802". California. O’Reilly Media.
  4. Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2 (2A, 2B, 2C, & 2D): Instruction Set Reference, A-Z "https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html"
  5. "http://www.c-jump.com/CIS77/CPU/x86/lecture.html"